Solution based all-additive printing process enables low cost fabrication of electronic devices on a large area flexible substrate. These printing processes offer several advantages, including fast prototyping with on-demand custom device, patterning devices at low temperature, and applies to a broad range of applications for electronic device manufacture.
Demand continues to drive improvements to fabricate faster, smaller and lower cost devices with higher integrated circuit density. Many of these printing processes use organic semiconductors. Organic thin-film transistors (OTFT) have low electron or hole mobility. Because of this low mobility, the desired device performance requires a large ratio of the TFT channel width to channel length (W/L).
FIG. 1 shows an example of an inverter 10 manufactured from current ink jetting techniques. Conventional ink jetting technology produces a line 12 having a minimum line width of about 60 micrometers for channel 14, with the minimum channel length being about 30 micrometers. The large W/L ratio is realized by a large channel width of about 2 millimeters for the TFT channel, resulting in a W/L ratio of approximately 67 (2000/30). The resulting circuit size therefore has a larger than desirable size.
The transistor current in the linear or saturation region is proportional to the W/L ratio or the square of the W/L ratio, minimizing the channel length allows for higher currents. In addition to the challenge of minimizing the channel length, the wide width of the conductive lines or traces causes a large area of the overlap between source/drain (11/12) and gate 16 of the transistor made by a conventional jetting technique. In one embodiment, the overall area is approximately 9×104 micrometers2. Minimizing the overlap area will result in reducing the overlap parasitic capacitance and improving the device speed.